1. Field of the Invention
The present invention generally relates to a manufacturing method for a semiconductor device. More particularly, the present invention relates to a manufacturing method for a semiconductor device used as a power semiconductor device, e.g., a vertical MOSFET (metal oxide semiconductor field effect transistor) and an IGBT (insulated gate bipolar transistor), and can suitably be employed for a single unit power semiconductor device or a MOS-IC including such power semiconductor device.
2. Related Arts
As for a conventional semiconductor device which remarkably reduces the ON-resistance per area, a vertical type MOSFET having a concavity on the surface thereof and a channel region disposed at the sidewall surface of the concavity has been disclosed in the International Publication No. PCT
The concavity of the proposed device is fabricated by a combination of local oxidation of silicon (LOCOS) technique and chemically etching off the formed thick oxide film using wet etching. That is to say, before removing the thick oxide film, a body region and a source region for each cell are formed by using the thick oxide film as a double diffusion mask so as to self-align with the side of the thick oxide film, and then a gate insulating film and a gate electrode are formed in the concavity after removing the thick oxide film.